The present invention relates to a sound image localization control device for imparting sound image localization to each of plural sound signals supplied from different sound sources.
It is generally known that by controlling the sound pressure levels of sounds output from speakers of two or more channels, sound image localization in the sound field can be controlled in a desired manner. Where sound image localization is to be controlled by controlling the sound pressure levels, sound image localization control devices are used which cause the sound pressure levels of the respective outputs from right and left speakers to differ from each other while maintaining the total acoustic output at a constant level, to thereby allow the sound image to be localized at a position closer to the speaker of greater sound pressure level. A so-called "stereo pan pot" is used to maintain the total acoustic output at a constant level. Namely, the stereo pan pot controls the right and left sound pressure levels in such a manner that the total acoustic output is maintained at a constant level even when the sound image is panned to an arbitrary position within the sound field.
The conventional sound image localization control devices also operate to cause sounds output from the right and left speakers to reach the listener's right and left ears at slightly different time points by delaying the sound signal by predetermined time via delay circuitry, so as to allow the sound image to be localized at a position closer to one of the speakers whose output sound reaches the ear earlier than the other speaker.
FIG. 14 is a block diagram showing the general structure of a typical prior sound image localization control device employing delay circuitry. This prior art sound image localization control device is designed to impart independent sound image localization to each of sound signals input from three sound source A, B and C. More specifically, the sound image localization control device is comprised of six delay circuits D1 to D6, six multipliers M1 to M6, and six adders A1 to A6.
Delay circuits D1 and D2 process the sound signal from the sound source circuit A to cause the sound wave to reach the right and left ears of the listener with a slight time difference (this time difference will hereinafter be called an "ear-reaching time difference"). Likewise, the delay circuits D3 and D4 serve to impart such an ear-reaching time difference to the sound signal from the sound source circuit B. Further, the delay circuits D5 and D6 serve to impart such an ear-reaching time difference to the sound signal from the sound source circuit C. The multipliers M1 and M2 process the sound signal from the sound source circuit A to cause the sound wave to reach the right and left ears of the listener with a slight level difference (this level difference will hereinafter be called an "ear-reaching level difference". Likewise, the multipliers M3 and M4 serve to impart such an ear-reaching level difference to the sound signal from the sound source circuit B. Further, the multipliers M5 and M6 serve to impart such an ear-reaching level difference to the sound signal from the sound source circuit C.
The delay circuits D1, D3 and D5, multipliers M1, M3 and M5 and adders A1, A3 and A5 together generate sound for the left (L) channel, while the delay circuits D2, D4 and D6 and multipliers M2, M4 and M6, and adders A2, A4 and A6 together generate sound for the right (R) channel.
The delay circuit D1 delays the signal from the sound source circuit A by predetermined time DAL and outputs the resultant delayed signal to the multiplier M1. The multiplier M1 multiplies the signal, delayed by the delay circuit D1, by a predetermined coefficient LAL and outputs the multiplication result to the adder A1. The adder A1 adds the output signal from the multiplier M1 to an initial value "0", and outputs the addition result to the next-stage adder A3. Namely, the adder A1 provides the output signal from the multiplier M1 directly to the adder A3 and hence may be omitted. The delay circuit D3 delays the signal from the sound source circuit B by predetermined time DBL and outputs the resultant delayed signal to the multiplier M3. The multiplier M3 multiplies the signal, delayed by the delay circuit D3, by a predetermined coefficient LBL and outputs the multiplication result to the adder A3. The adder A3 adds together the output signals from the adder A1 and multiplier M3 and outputs the addition result to the next-stage adder A5. The delay circuit D5 delays the signal from the sound source circuit C by predetermined time DCL and outputs the resultant delayed signal to the multiplier M5. The multiplier M5 multiplies the signal, delayed by the delay circuit D5, by a predetermined coefficient LCL and outputs the multiplication result to the adder BAS. The adder A5 adds together the output signals from the adder A3 and multiplier M5 and outputs the addition result as sound for the left channel.
The delay circuit D2 delays the signal from the sound source circuit A by predetermined time DAR and outputs the resultant delayed signal to the multiplier M2. The multiplier M2 multiplies the signal, delayed by the delay circuit D2, by a predetermined coefficient LAR and outputs the multiplication result to the adder A2. The adder A2 adds the output signal from the multiplier M2 to an initial value "0", and outputs the addition result to the next-stage adder A4. The delay circuit D4 delays the signal from the sound source circuit B by predetermined time DBR and outputs the resultant delayed signal to the multiplier M4. The multiplier M4 multiplies the signal, delayed by the delay circuit D4, by a predetermined coefficient LBR and outputs the multiplication result to the adder A4. The adder A4 adds together the output signals from the adder A2 and multiplier M4 and outputs the addition result to the next-stage adder A6. The delay circuit D6 delays the signal from the sound source circuit C by predetermined time DCR and outputs the resultant delayed signal to the multiplier M6. The multiplier M6 multiplies the signal, delayed by the delay circuit D6, by a predetermined coefficient LCR and outputs the multiplication result to the adder A6. The adder A6 adds together the output signals from the adder A4 and multiplier M6 and outputs the addition result as sound for the right channel.
Here, the ear-reaching time difference is the absolute value of the difference .vertline.DAL-DAR.vertline., .vertline.DBL-DBR.vertline. or .vertline.DCL-DCR.vertline. between the delay times of the delay circuits D1 and D2, D3 and D4, or D5 and D6 corresponding to the sound source circuit A, B or C. The maximum ear-reaching time difference is obtained by dividing the distance between the ears by the speed of sound; if the distance between the ears is about 17 cm, the maximum ear-reaching time difference will be 0.5 ms (=17/33000). If, for example, the sampling frequency of the sound image localization control device shown in FIG. 14 is 50 kHz, the delay time corresponding to one sampling period will be 0.02 ms, and hence each of the delay circuit D1 to D6 is comprised of about 25 delay stages in order to smoothly time-vary sound image localization and achieve the maximum delay time of 0.25 ms.
With the prior art, in order to provide the feeling of independent sound image localization for each of plural (N) sound sources, the two-channel (right- and left-channel) reproduction system requires at least 2N delay circuits, each of which has to be comprised of memory corresponding to at least 25 stages. Consequently, there is encountered the problem that the memory capacity necessary for the delay circuits has to greatly increase as the number of sound sources increases.